How Transistors Think: Boolean Logic Built from Sand

Your phone contains 15 billion transistors, each one a tiny switch made from processed sand. How these switches — doing nothing more than turning on and off — produce everything from spreadsheets to video calls.

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From Sand to Thought

There’s something I find deeply strange about the device you’re reading this on. Somewhere inside it, billions of tiny switches are flipping on and off. Each switch is made from silicon — processed sand, basically — and each one does nothing more sophisticated than letting current flow or blocking it. On or off. 1 or 0. That’s all.

And yet, somehow, a few billion of these braindead switches, wired together in the right pattern, can display text, play music, run a weather simulation, or beat the world champion at chess. The gap between what each transistor does (almost nothing) and what the whole chip does (almost everything) is so vast that it’s hard to bridge conceptually.

This article is my attempt to bridge it. We’ll start with semiconductor physics — what a transistor actually is and how it works — and end up at Boolean logic, which is how “on and off” becomes “if and therefore.”

What a Transistor Does

A transistor, at its most basic, is a voltage-controlled switch. Apply a voltage to one terminal (the gate), and current flows between two other terminals (source and drain). Remove the voltage, and current stops. On or off.

The most common type in modern processors is the MOSFET — metal-oxide-semiconductor field-effect transistor. Here’s how it works, stripped down to the essential physics.

Start with a slab of silicon doped to be p-type (a few boron atoms mixed in, creating “holes” — missing electrons — that act as positive charge carriers). This is the substrate. On top of it, create two small regions of n-type silicon (doped with phosphorus, creating excess electrons). These are the source and the drain.

Between the source and drain, lay down a thin layer of silicon dioxide (SiO₂) — an insulator — and on top of that, a metal or polysilicon electrode: the gate.

With no voltage on the gate, the p-type region between source and drain blocks current flow. Electrons from the n-type source have no easy path to the n-type drain because the p-type region in between acts as a barrier (two back-to-back p-n junctions, if you want to be technical).

Now apply a positive voltage to the gate. The electric field from the gate penetrates through the thin oxide and repels holes in the p-type substrate while attracting electrons from the source and drain regions. A thin layer of electrons accumulates at the surface of the substrate, just below the oxide — a conducting channel between source and drain. Current flows. The switch is on.

Remove the gate voltage and the channel disappears. The switch is off.

That’s a MOSFET. The gate controls the channel. No mechanical parts. No moving contacts. Just an electric field rearranging charge carriers in a slab of silicon. Switching happens in picoseconds — trillions of times per second.

From Switch to Logic

A single transistor can be on or off. Not very useful by itself. The magic happens when you combine transistors into logic gates — circuits that implement Boolean operations.

There are a handful of fundamental Boolean operations, and you only need two types of transistors to build all of them: NMOS (conducts when gate is high) and PMOS (conducts when gate is low). Together, they form CMOS — complementary metal-oxide-semiconductor — the technology behind virtually every digital chip made in the last 40 years.

The inverter (NOT gate): The simplest logic gate. One input, one output. If the input is 1 (high voltage), the output is 0 (low voltage), and vice versa. Built from one NMOS and one PMOS transistor: when input is high, NMOS conducts and pulls output low; when input is low, PMOS conducts and pulls output high. Two transistors. One logical operation.

The NAND gate: Two inputs, one output. The output is 0 only when both inputs are 1. Otherwise, the output is 1. Built from four transistors (two NMOS in series, two PMOS in parallel). This is the universal gate — every Boolean function can be built from NAND gates alone. If you can build a NAND, you can build anything.

The NOR gate: Two inputs, one output. The output is 1 only when both inputs are 0. Also universal. Also four transistors. NOR and NAND are duals of each other.

From these primitives, you build everything else. An AND gate is a NAND followed by an inverter. An OR gate is a NOR followed by an inverter. An XOR (exclusive or) is a combination of NAND, OR, and AND gates. An adder — a circuit that adds two binary numbers — is built from XOR, AND, and OR gates. A multiplier is built from adders. An arithmetic logic unit (ALU) is built from adders, multipliers, and comparators. A processor is built from ALUs, registers, control logic, and memory.

Every layer is built from the layer below. The hierarchy is: transistors → gates → functional units → processors. At every level, the components do something simple. The complexity comes from the wiring — the pattern of connections — not from any individual part.

Why Binary?

You might wonder: why 1 and 0? Why not use three levels (ternary) or ten (decimal)? Wouldn’t that pack more information per switch?

In principle, yes. And ternary computers have been built (most famously the Soviet Setun in 1958). But binary won for deeply practical reasons rooted in physics.

A transistor is naturally a two-state device. It’s either conducting well (on, lots of current) or not conducting (off, negligible current). These two states are separated by a large margin — the on-current might be 1,000 times the off-current. That margin is noise immunity. Electrical noise, temperature variations, and manufacturing imperfections all cause the actual voltage to fluctuate. With only two states widely separated, the circuit can tolerate a lot of noise before misinterpreting a 0 as a 1 or vice versa.

With three or more states, you’re dividing the available voltage range into smaller intervals. The noise margin shrinks. The transistor must operate in intermediate regions where small perturbations can flip the state. Error rates go up. You either need much better components or much more error correction. In practice, the engineering difficulty of multi-level logic at high speed has always exceeded the benefit of packing more information per switch.

For storage — flash memory, for instance — multi-level cells are used (storing 2, 3, or 4 bits per cell by distinguishing 4, 8, or 16 voltage levels). But this only works because storage is read infrequently and slowly compared to logic operations. For the fast switching core of a processor, binary remains king.

Clock Speed: The Drumbeat

Every processor has a clock — an oscillator that produces a square wave at a specific frequency, typically 3–5 GHz in modern desktop chips. This clock synchronises all the transistors, ensuring that they switch in lockstep.

On each clock tick, every logic gate reads its inputs, computes its output, and settles to a stable state before the next tick. The clock period (the time between ticks) must be longer than the worst-case delay through the longest chain of logic gates — the critical path. If the clock is too fast, signals don’t have time to propagate and the circuit produces wrong answers.

At 5 GHz, each clock cycle lasts 0.2 nanoseconds — 200 picoseconds. In that time, light travels about 6 cm. Electrical signals in copper traces travel somewhat slower (roughly 60–70% of the speed of light). The physical size of the chip — about 1–2 cm on a side — means that signals take a significant fraction of the clock period just to cross the die. At these speeds, the speed of light becomes a design constraint. This is why modern chips have deep pipeline architectures and distributed clock trees — managing signal propagation delays is one of the central challenges of chip design.

Power: The Wall We Hit

For decades, each new generation of transistors was smaller, faster, and used less energy per switch. This was the golden age of Moore’s Law scaling — the number of transistors per chip doubled every two years, clock speeds climbed, and power consumption stayed manageable.

Around 2005, this hit a wall. The wall was physics, specifically thermodynamics.

When a transistor switches, it dissipates energy — partly from charging and discharging the gate capacitance (dynamic power), partly from leakage current flowing through the off-state transistor (static power). As transistors got smaller, the gate oxide got thinner, and quantum tunnelling through the oxide increased leakage current. Simultaneously, packing more transistors onto a chip concentrated more heat into less area.

The result: chips started hitting thermal limits. You couldn’t clock them faster without melting them. Single-core clock speeds peaked around 3–4 GHz in the mid-2000s and haven’t increased much since. Instead, the industry shifted to multi-core designs — putting more processing cores on the same chip, each running at a moderate clock speed. Your phone has 6–8 cores not because each core is faster than what we had in 2005, but because making one core faster would require unmanageable cooling.

This is a genuinely deep constraint. The energy dissipated per logic operation has a theoretical minimum set by thermodynamics — the Landauer limit, about 3 × 10⁻²¹ joules per bit erasure at room temperature. Current transistors operate about 1,000 times above this limit. There’s room for improvement, but not unlimited room. And every improvement in energy efficiency has historically been eaten by cramming more transistors onto the chip.

From Sand to Everything

The chain from raw material to functioning computer goes like this: mine quartz sand, refine it to 99.9999999% pure silicon, grow a single crystal, slice it into wafers, and pattern billions of transistors onto each wafer using photolithography at wavelengths of 13.5 nm (extreme ultraviolet light). Each transistor is a voltage-controlled switch. Wire the switches into logic gates. Wire the gates into functional units. Wire the units into a processor. Add memory, I/O, and power management. Package the chip, solder it to a board, write software, and you get a device that can predict the weather, translate languages, and show you cat videos.

Every step along that chain involves physics — semiconductor band theory, electromagnetic optics, thermodynamics, quantum mechanics. The end product is something that seems almost biological in its complexity, but it’s built from the simplest possible computational primitive: a switch that’s either on or off. There’s something deeply satisfying about that — the idea that all the complexity of modern computing reduces, at the bottom, to sand and Boolean algebra.

Frequently Asked Questions

How small are modern transistors?

As of 2024–2025, leading-edge chips use process nodes labelled '3 nm' (TSMC, Samsung), though this number no longer corresponds directly to any physical dimension on the transistor — it's a marketing designation. The actual gate length of modern transistors is roughly 5–12 nm, depending on the design. For perspective, a silicon atom is about 0.2 nm across, so a modern transistor gate is only 25–60 atoms wide. At these scales, quantum effects like tunnelling become a significant engineering challenge — electrons can tunnel through barriers that are supposed to be insulating, causing leakage current and wasted power.

What happens when transistors can't get any smaller?

This has been predicted (and delayed) for decades. The fundamental limit is quantum mechanics: below a certain size, electrons tunnel through the transistor's gate oxide and the device can't reliably distinguish 'on' from 'off.' Engineers have responded with architectural innovations — FinFET transistors (3D structures instead of flat), gate-all-around (GAA) nanosheets, and chiplet designs that combine multiple smaller dies. Beyond silicon, researchers are exploring carbon nanotube transistors, 2D materials like molybdenum disulphide, and entirely different computing paradigms like neuromorphic chips and quantum computing. Moore's Law as a scaling law is slowing, but computing capability continues to advance through design innovation.

Why silicon and not some other material?

Silicon won the semiconductor race for several practical reasons, not because it's the best semiconductor in every respect (gallium arsenide has higher electron mobility, for instance). Silicon's advantages: its oxide (SiO₂) forms a nearly perfect insulating layer spontaneously — critical for building transistor gates. It's the second most abundant element in Earth's crust (after oxygen), so raw material is cheap. Its bandgap (1.12 eV) is well-suited for room-temperature operation. And decades of manufacturing know-how have made silicon fabrication extraordinarily refined. The entire global semiconductor infrastructure — worth hundreds of billions of dollars — is optimised for silicon. Switching to a different material would require rebuilding that infrastructure essentially from scratch.

How many transistors are in a modern chip?

Apple's M4 Max chip (2024) contains about 40 billion transistors. Nvidia's B200 GPU contains about 208 billion transistors. These numbers are almost impossible to grasp intuitively. If each transistor were a grain of sand (roughly 0.5 mm), 40 billion grains would fill about 10 bathtubs. The fact that they all fit on a chip the size of a fingernail — and switch billions of times per second — represents one of the most extraordinary engineering achievements in human history.

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